This provides specific information to assist you with development of programs for the ADSP-BF527 EZ-KIT Lite evaluation system. These are tailored excerpts from the BF527 EZ-Kit manual v1.2 (2008) BF527 EZ-Kit manual - v1.6 (2010)
Your ADSP-BF527 EZ-KIT Lite evaluation system package contains the following items.
It also may include things not needed for Linux development including:
When removing the EZ-KIT Lite board from the package, handle the board carefully to avoid the discharge of static electricity, which can damage some components. Figure below shows the default jumper settings, switches, connector locations, and LEDs used in installation. Confirm that your board is in the default configuration before using the board.
The default EZ-Kit setup has test LDRs in the parallel NOR flash and the SPI flash. You have two choices to get U-Boot setup initially:
Both methods are documented in loading.
The default SW1 settings will have the ethernet disconnected.
|Off, Off, On, Off||Ethernet is disabled|
|On, On, Off, On||Ethernet is enabled|
If you get errors in U-Boot, like:
bfin> dhcp BOOTP broadcast 1 Ethernet: tx errorThis normally means this switch is set incorrectly.
The relevant BMODE settings are the same as the BF52x family. For the full list, see the BF52x datasheet.
|SW2 Position||Boot Mode|
|0||Idle - no booting|
|1||Boot LDR from parallel flash|
|3||Boot LDR from SPI flash|
|7||Boot LDR over UART0|
|8||Boot LDR over UART1|
Keep in mind that UART1 is the populated connector on the BF527-EZkit and UART0 is just the pin header. Also keep in mind the dot on the switch bar is not the the direction indicator, the gap far away from the dot is. for example if switch the dot to position between 2 and 3, you are actually switching to position 8 for UART1 boot.
If MIC is selected as capture input,then the gain can be adjusted through SW4.
|On, Off, Off, NC||14dB|
|Off, On, Off, NC||0dB|
|Off, Off, On, NC||-6dB|
The codec must be configured to TWI/SPI mode as well.
|x, x, Off, On||TWI|
|x, x, On, Off||SPI|
“x” means it has nothing to do with the mode selection,but they should be configured to “Off” in real use.
The Ethernet mode flash CS switch (SW9) sets the bootstrapping options for the LAN8700 RMII PHY chip (U14).
|SW9[0:2]||MODE[2:0]||Setting Mode Definitions|
|OFF OFF OFF||111||All capable, auto negotiation (default)|
|OFF OFF ON||110||Power down mode|
|OFF ON OFF||101||Repeater mode, auto negotiation|
|OFF ON ON||100||100Base-TX half duplex advertised, auto negotiation|
|ON OFF OFF||011||100Base-TX full duplex|
|ON OFF ON||010||100Base-TX half duplex|
|ON ON OFF||001||10Base-T full duplex|
|ON ON ON||000||10Base-T half duplex|
SW9.4 disconnects SPISEL1 from the SPI flash chip (U8). Setting SW9 position 4 OFF is useful when using SPISEL1 on the expansion interface at connector J2 pin 11. SW9 default setting is position 4 ON.
If you are having troubles with the UART, check out if you are using the correct serial cable
|Off, On, Off, Off||UART is disabled no flow control|
|Off, On, Off, On||UART is enabled no flow control (default)|
|On, On, On, Off||UART is enabled with flow control|
|On, On, On, On||UART is enabled with flow control loopback|
|Set||UART TXD/RXD Loopback|
|On, On, On, x||Rotary Ecoder is connected|
|x, x, x, On||Nand Chip is enabled|
For USB Host Support make sure SW13 is configured following
|SW13-2 OFF||Disable Push Button 2|
|SW13-6 ON||Connect GPIO with USB_VRSEL|
SW17,SW20 must all be configured to “ON” to enable the SPORT0A for audio RX/TX.To enable on-board SPORT0 socket,these two switchs must all be configured to “OFF”.
The codec's registers can be configured through TWI or SPI,currently TWI is used by the audio codec by default.
^ SW19 Positions ^ Mode ^
|Off, On, Off, On||TWI is enabled|
|On, Off, On, Off||SPI is enabled|
The ADSP-BF527 EZ-KIT Lite board includes four types of external memory:
The ADSP-BF527 processor connects to a 64 MB Micron MT48LC32M16A2TG-75 chip through the external bus interface unit (EBIU). The SDRAM chip can operate at a maximum clock frequency of 133 MHz.
There is a trade-off between selecting the maximum core clock (CCLK) of the processor and the maximum system clock. Consequently, the respective control registers must be initialized appropriately to get either maximum CCLK or maximum SCLK.
The parallel flash memory interface of the ADSP-BF527 EZ-KIT Lite contains a 4 MB (2M x 16 bits) ST Micro M29W320EB chip. Flash memory connects to the 16-bit data bus and address lines 1 through 19. Chip enable is decoded by using AMS0–3 select lines through NAND and AND gates. The address range for flash memory is 0x20000000 to 0x203FFFFF.
Flash memory is pre-loaded with boot code for the blink, LCD images, and power-on-self test (POST) programs.
By default, the EZ-KIT Lite boots from the 16-bit parallel flash memory. The processor boots from flash memory if the boot mode select switch (SW2) is set to a position of 1.
The ADSP-BF527 processor is equipped with an internal NAND flash controller, which allows the 4 Gbit ST Micro’s NAND04 device to be attached gluelessly to the processor. NAND flash is attached via the processor’s specific NAND flash control and data lines. NAND flash shares pins with the Ethernet PHY, host connector, and expansion interface.
The NAND chip enable signal (NDCE#_HOSTD10) can be disconnected from NAND flash by turning OFF SW11.4 (switch 11 position 4). This ensures that the NAND will not be driving data when HOSTD10 changes state. See “Rotary NAND Enable Switch (SW11)” on page 2-16 for more information.
The Ethernet PHY (U14) must be disabled in order for NAND flash to function properly. This is accomplished by setting SW1 to OFF, OFF, ON, OFF.
For more information about the NAND04 device, refer to the ST Microelectronics Web site at: http://www.st.com/stonline/products/families/memories/memory/index.htm
The ADSP-BF527 processor has one serial peripheral interface (SPI) port with multiple chip select lines. The SPI port connects directly to serial flash memory, MAX1233 touchscreen and keypad controller, audio codec, and expansion interface.
Serial flash memory is a 16 Mb ST Micro M25P16 device, which is selected using the SPISEL1 line of the processor. SPI flash memory is pre-loaded with boot code for the blink and POST programs. By default, the EZ-KIT Lite boots from the 16-bit flash parallel memory. SPI flash can be selected as the boot source by setting the boot mode select switch (SW2) to position 3.
There are no Linux drivers for the MAXIM part that drives the touchscreen and the keypad on earlier versions of the EZkit. There are no plans to write such drivers at this time. Users have developed a driver for the 2008R1+ release. You can find it by searching the uClinux-dist forums.
There are Linux drivers for the AD7879 touchscreen controller which is found on current versions of the development board.
There is a Linux driver for the USB interface and should generally work OK. Any feedback on it is appreciated via our forums.
Pull-Down on SPISCK prevent SPI SD/MMC card to work properly.
Remove Pull-Up R25 located bottom side of the EZKIT close to connector J3. This may cause problems with the onboard SPI Flash.
Pull-Up on DR1PRI prevents AD1981 audio card to work properly.
Remove Pull-Up R176 located bottom side of the EZKIT close to connector J3. This may cause LED1 to flicker when not actively driven.